ELAPSED TIME COMPARISION OF THE LFSR PARALLEL AND SEQUENTIAL OUTPUT GENERATION

Abstract

The linear feedback shift registers (LFSR) are designed for pseudo-random number generation. These numbers consist of one and zero sequences and have a repeating period. LFSR has a maximum repeating period if the unique output bits length is equal to 2n-1. The LFSR used in encryption and signal processing (CDMA). The time of generation of LFSR’s output data depends on the required output bit’s length, the longer is the required output length the more time it will require for generation. If the data or signal is encrypted with long-length LFSR output data it will require a long time for the receiver to decrypt the received data as it will first start the local generation of LFSR’s output data and then start the decryption process. The parallel generation of the LFSR’s output bits allows shorting the generation time and, based on that, the time for data encryption and decryption is short too. 

The output bits of LFSR can be generated in a sequential and parallel manner. In this article, we will generate the output data in both ways, and calculate and compare the generation time.