SYNTHESIS OF THE SQUARE ROOT EXTRACTION DEVICE BASED ON FPGA

Authors

A.K. TUMANYAN National Polytechnic University of Armenia Author
A.G. HOVHANNISYAN National Polytechnic University of Armenia Author
A.H. HAMAZASPYAN National Polytechnic University of Armenia Author
A.G. QAMALYAN National Polytechnic University of Armenia Author

Keywords:

FPGA, Verilog, LUT, CLB, square root

Abstract

Issues on designing a device for extracting the square root of an integer and floating-point numbers are considered. The two implementations of the device- the combination and the sequential type (with FSM) obtained by synthesis using a system design XILINX ISE Design Suite 14.2 are compared.

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Published

30.07.2026

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