DESIGN OF A COMPARATOR USED IN I/O UNITS OF INTEGRATED CIRCUITS FOR A 14-NAM COMPLEMENTARY METAL-OXIDESEMICONDUCTOR TECHNOLOGICAL PROCESS

Authors

  • G.A. Ohanyan CJSC "SYNOPSIS ARMENIA" Author
  • M.T. Manvelyan CJSC "SYNOPSIS ARMENIA" Author
  • M.Ts. Ayvazyan National Polytechnic University of Armenia Author

Keywords:

comparator, SPICE, symmetrical and asymmetrical layout, physical layout

Abstract

In order to have high data transfer speeds, it is necessary to develop receiving and transmitting systems. Receiving and transmitting systems can transmit those speeds without a loss of data. Electromagnetic fields cause noise on transmission lines with uncoordinated wave resistance, and the network of these noises can disrupt the proper operation of the device.As we know, a comparator is an integral part of receiving and transmitting devices designed to compare two analog signals. We give an analog signal at the input of the circuit and receive a digital one at the output. Thus, a comparator can be thought of as an element that performs transitions from an analog signal to a digital one, that is why, it is often referred to as a one-bit analog converter. The comparator has many parameters. These include speed, power consumption, sensitivity, threshold voltage, etc. High-speed comparators allow to get a maximum speed while they take up less space. It is suggested to design a clocked comparator for the 14-nm CMOS technological process, which will have an input sensitivity of 4 mV at a clock rate of 3 GHz. During the research, one scheme wasobserved, parametric optimization wasperformed through the SPICE model, physical modeling was performed using Custom Compiler. The results were displayed and measured using WaveView. 

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Published

03.03.2026

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