OPTIMIZING THE R-STRING DIGITAL-TO-ANALOG CONVERTER USING A COMPARATOR

Abstract

A new method for optimizing the resistor string (r-string) digital-to-analog converter (DAC) is presented. The output voltage value of the primary r-string DAC can have some deviations from the right value. For example, at high input combinations the output voltage can be lower than the correct voltage, or at low input combinations, it can be higher than the correct voltage. Also, the output signal has got high noises, when at the same time more than one transmission gates are switching. By the new optimization method, the deviation of the output signal from the correct voltage is very small. Also, noises of the output signal are reduced. In the primary 3-bit r-string DAC designed in 32 nanometer technology, the integral nonlinearity (INL) error at 000 input combination is 0.03 V, at 111 combination it is 0.1 V. In the optimized 3-bit DAC, which is also designed in 32 nanometer technology, the maximum INL error is 0.0025 V. The delay time range of the output signal in optimized DAC is nearly the same as in the primary DAC. The area of the optimized DAC is higher than the area of the primary r-string DAC by 78%, as in the new circuit two schemes with resistors and transmission gates instead of one are used, and instead of an operational amplifier (op-amp), two comparators and a current mirror connected with feedback loop are used. As DAC has got a wide application in modern electronic devices, its exact output signal is very important for its use.