A SPEED INCREASING METHOD IN AUTOMATED WRITE LEVELING OF SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY

Authors

Z.M. AVETISYAN National Polytechnic University of Armenia Author

Keywords:

SDRAM, clock signal, write leveling, fly-by topology

Abstract

The procedure of write leveling which has a key role in the synchronous dynamic random access memory (SDRAM) is investigated. The mentioned procedure was modeled and some key parameters were measured. During the investigation, it was found that the procedure has a long delay. For the speed increase, some change is proposed in the write leveling algorithm.

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Published

05.05.2026

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