AUTOMATIC DETECTION OF ANALOG CIRCUIT BUILDING BLOCKS FROM TRANSISTOR-LEVEL NETLISTS USING ARTIFICIAL INTELLIGENCE

Abstract

This paper presents a method for automatic detection of typical analog circuit building blocks from transistor-level SPICE descriptions using artificial intelligence and machine learning techniques. The relevance of the problem is associated with the fact that modern integrated circuits contain numerous repeating analog structures whose identifica-tion is important for design automation, reverse engineering, technical analysis, and inte-gration into CAD environments. SPICE netlists are widely used as textual circuit represen-tations; however, they do not explicitly describe the functional hierarchy of a circuit, which makes their automatic interpretation a challenging task.

The proposed framework includes preprocessing of netlists, removal of comments, normalization of node names, extraction of structural features, and supervised classifica-tion. The extracted features include the total number of transistors, NMOS/PMOS ratio, presence of shared gate nodes, symmetry indicators, diode-connected devices, and connec-tivity density. Based on the generated feature vectors, a Random Forest classifier is applied to recognize typical analog structures such as current mirrors and differential amplifiers.

Experimental studies demonstrate that the proposed method provides reliable ac-curacy for small and medium-size circuits while maintaining computational efficiency. A decrease in recognition accuracy is observed for larger netlists due to increased structural complexity and limited training data. Nevertheless, the approach remains scalable and suit-able for practical implementation.

The developed method can be used in automated circuit analysis, reverse engineer-ing systems, and electronic design automation tools. Future work may include expansion of the dataset, hierarchical block recognition, and application of graph-based neural network models for improved structural understanding.